[Software Optimization and Reconstruction] Run-time Memory Optimization for DDMB Architecture through CCB Algorithm, Embedded Software Optimization (ESO), also appear in Lecture Notes in Computer Science, Aug 2006

 

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International Papers

Software Optimization and Reconstruction VISTA : VPO Interactive Systems for Tuning Applications, ACM Transactions on Embedded Systems, Nov 2006
Software Optimization and Reconstruction A Rule-based Optimal Placement of Scaling Shifts in Floating-point to Fixed-point Conversion for a Fixed-point Processor, International SoC Design Conference, Oct 2006
Application Specific Architectures Temporal Mapping for Loop Pipelining on a MIMD style Coarse-Grained Reconfigurable Architecture, International SoC Design Conference, Oct 2006
Application Specific Architectures Power-conscious Configuration Cache Structure and Code Mapping for Coarse-grained Reconfigurable Architecture, International Symposium on Low Power Electronics Design (ISLPED), Oct 2006
Software Optimization and Reconstruction Instruction Re-selection for Iterative Modulo Scheduling on High Performance Multi-issue DSPs, Embedded Software Optimization (ESO), also appear in Lecture Notes in Computer Science Aug 2006 ( Best Paper, selected for book chapter publication)
Software Optimization and Reconstruction Run-time Memory Optimization for DDMB Architecture through CCB Algorithm, Embedded Software Optimization (ESO), also appear in Lecture Notes in Computer Science, Aug 2006
Application Specific Architectures Bypass Aware Instruction Scheduling for Register File Power Reduction, ACM SIGPLAN conference on Languages, Compilers, Tests of Embedded Systems, Jun 2006 (Best paper, invited for ACM Transactions on Embedded Computing Systems)
Application Specific Architectures A Spatial Mapping Algorithm for Heterogeneous Coarse-Grained Reconfigurable Architectures, Design Automation and Test in Europe (DATE), Mar 2006
Application Specific Architectures Automatic Generation of Operation Tables for Fast Exploration of Bypasses in Embedded Processors, Design Automation and Test in Europe (DATE) Mar 2006
Software Optimization and Reconstruction Using a retargetable compiler to find an optimal instruction-set for fixed-point audio codec, International SoC Design Conference, Oct 2005
Software Optimization and Reconstruction A new ADL based compiler for embedded processor design, International SoC Design Conference, Oct 2005
Software Optimization and Reconstruction Compiler transformations for effectively exploiting a zero overhead loop buffer, Software Practice & Engineering, Dec 2004
Software Optimization and Reconstruction Using Multiple Load/Store Instructions for Code Optimization, International SoC Design Conference, Oct 2004
Software Optimization and Reconstruction Exploiting Parallelism in Memory Operations for Code Optimizations, Workshop on Languages and Compilers for Parallel Computing, also appear in Lecture Notes in Computer Science, Sep 2004
Software Optimization and Reconstruction Code Optimizations for a VLIW-style Network Processing Unit, Software Practice & Engineering, Apr 2004
Software Optimization and Reconstruction Fast Memory Bank Assignment for Fix-point Digital Signal Processors, ACM Transactions on Design Automation of Electronic Systems (TODAES), Jan 2004
Software Optimization and Reconstruction A Quantitative Comparison of Two Retargetable Compilation Approaches, International Conference on Parallel Processing (ICPP-03), Oct 2003
Software Optimization and Reconstruction Cases Studies on Automatic Extraction of Architectural Parameters in Complex Code Generation, Software and Compilers for Embedded Systems (SCOPES), also appear in Lecture Notes in Computer Science, Sep 2003
Software Optimization and Reconstruction Finding Effective Optimization Phase, ACM SIGPLAN Conference on Languages, Compilers, and Tools for Embedded Systems(LCTES), and also appears in ACM SIGPLAN Notices, Jun 2003
Software Optimization and Reconstruction Experience with a Retargetable Compiler for a Commercial Network Processor, International Conference on Compiler, Architecture and Synthesis for Embedded Systems (CASES), Oct 2002