[Software Optimization and Reconstruction] Using Multiple Load/Store Instructions for Code Optimization, International SoC Design Conference, Oct 2004

 

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International Papers

Software Optimization and Reconstruction Software Controlled Memory Layout Reorganization for Irregular Array Access Patterns, ACM International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES 2007), Oct 2007
Application Specific Architectures Efficient Mapping onto Coarse-Grained Reconfigurable Architectures using Graph Drawing based Algorithm, Workshop on Application Specific Processors (WASP), Sep 2007 (Best paper, invited for IEEE Transactions on VLSI)
Software Optimization and Reconstruction Optimistic Coalescing for Heterogeneous Register Architectures, ACM Conference on Languages, Compilers and Tools for Embedded Systems or ACM SIGPLAN Notice, Jun 2007 ( Best paper)
Software Optimization and Reconstruction Preprocessing Strategy for Effective Modulo Scheduling on Multi-Issue Digital Signal Processors, International Conference on Compiler Construction (CC), also appear in Lecture Notes in Computer Science, Mar 2007
Software Optimization and Reconstruction A code generation strategy for heterogeneous register architectures, Workshop on Interaction between Compiler and Architecture (Interact), Feb 2007
Software Optimization and Reconstruction Efficient Embedded Code Generation with Multiple Load/Store Instructions, Software Practice & Experience, Feb 2007
Software Optimization and Reconstruction Fast Code Generation for Embedded Processors Fast Code Generation for Embedded Processors with Aliased Heterogeneous Registers, Transactions on High Performance Architecture and Compilation, Jan 2007
Application Specific Architectures Mapping Loops onto a Coarse-Grained Reconfigurable Architecture for High-Performance Embedded Systems, International Conference on Ubiquitous Information Technologies & Applications (ICUT), Feb 2007
Software Optimization and Reconstruction VISTA : VPO Interactive Systems for Tuning Applications, ACM Transactions on Embedded Systems, Nov 2006
Software Optimization and Reconstruction A Rule-based Optimal Placement of Scaling Shifts in Floating-point to Fixed-point Conversion for a Fixed-point Processor, International SoC Design Conference, Oct 2006
Application Specific Architectures Temporal Mapping for Loop Pipelining on a MIMD style Coarse-Grained Reconfigurable Architecture, International SoC Design Conference, Oct 2006
Application Specific Architectures Power-conscious Configuration Cache Structure and Code Mapping for Coarse-grained Reconfigurable Architecture, International Symposium on Low Power Electronics Design (ISLPED), Oct 2006
Software Optimization and Reconstruction Instruction Re-selection for Iterative Modulo Scheduling on High Performance Multi-issue DSPs, Embedded Software Optimization (ESO), also appear in Lecture Notes in Computer Science Aug 2006 ( Best Paper, selected for book chapter publication)
Software Optimization and Reconstruction Run-time Memory Optimization for DDMB Architecture through CCB Algorithm, Embedded Software Optimization (ESO), also appear in Lecture Notes in Computer Science, Aug 2006
Application Specific Architectures Bypass Aware Instruction Scheduling for Register File Power Reduction, ACM SIGPLAN conference on Languages, Compilers, Tests of Embedded Systems, Jun 2006 (Best paper, invited for ACM Transactions on Embedded Computing Systems)
Application Specific Architectures A Spatial Mapping Algorithm for Heterogeneous Coarse-Grained Reconfigurable Architectures, Design Automation and Test in Europe (DATE), Mar 2006
Application Specific Architectures Automatic Generation of Operation Tables for Fast Exploration of Bypasses in Embedded Processors, Design Automation and Test in Europe (DATE) Mar 2006
Software Optimization and Reconstruction Using a retargetable compiler to find an optimal instruction-set for fixed-point audio codec, International SoC Design Conference, Oct 2005
Software Optimization and Reconstruction A new ADL based compiler for embedded processor design, International SoC Design Conference, Oct 2005
Software Optimization and Reconstruction Compiler transformations for effectively exploiting a zero overhead loop buffer, Software Practice & Engineering, Dec 2004