[Application Specific Architectures] Temporal Mapping for Loop Pipelining on a MIMD style Coarse-Grained Reconfigurable Architecture, International SoC Design Conference, Oct 2006

 

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International Papers

Software Optimization and Reconstruction Automatic Parallelization for Non-cache Coherent Multiprocessors, Languages and Compilers for Parallel Computing, also appear in Lecture Notes in Computer Science, Vol. 1239, pp. 266-284, Springer-Verlag, Aug 1996
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