[Software Optimization and Reconstruction] Instruction Re-selection for Iterative Modulo Scheduling on High Performance Multi-issue DSPs, Embedded Software Optimization (ESO), also appear in Lecture Notes in Computer Science Aug 2006 ( Best Paper, selected for book chapter publication)

 

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International Papers

Application Specific Architectures Mapping Loops onto a Coarse-Grained Reconfigurable Architecture for High-Performance Embedded Systems, International Conference on Ubiquitous Information Technologies & Applications (ICUT), Feb 2007
Application Specific Architectures Temporal Mapping for Loop Pipelining on a MIMD style Coarse-Grained Reconfigurable Architecture, International SoC Design Conference, Oct 2006
Application Specific Architectures Power-conscious Configuration Cache Structure and Code Mapping for Coarse-grained Reconfigurable Architecture, International Symposium on Low Power Electronics Design (ISLPED), Oct 2006
Application Specific Architectures Bypass Aware Instruction Scheduling for Register File Power Reduction, ACM SIGPLAN conference on Languages, Compilers, Tests of Embedded Systems, Jun 2006 (Best paper, invited for ACM Transactions on Embedded Computing Systems)
Application Specific Architectures A Spatial Mapping Algorithm for Heterogeneous Coarse-Grained Reconfigurable Architectures, Design Automation and Test in Europe (DATE), Mar 2006
Application Specific Architectures Automatic Generation of Operation Tables for Fast Exploration of Bypasses in Embedded Processors, Design Automation and Test in Europe (DATE) Mar 2006